1. Field of the Invention
The present invention relates to hetero junction field effect transistors and methods of fabricating the same, and particularly to hetero junction field effect transistors allowing a recessed gate to be formed with good repeatability and methods of fabricating the same.
2. Description of the Background Art
Conventionally a normally off hetero junction field effect transistor utilizing a nitride based, group III-V compound semiconductor represented by a formula of AlxGayInzN has been implemented for example by etching a barrier layer of nitride based, group III-V compound semiconductor underlying a gate electrode in plasma to reduce the layer in thickness to form a recessed gate, wherein 0≦x≦1, 0≦y≦1, 0≦z≦1, and x+y +z≠0 (see “Normally Off AlGaN/GaN HEMT with Recessed Gate for High Power Applications”, Ken Nakata, Takeshi Kawasaki, and Seiji Yaegassi, IEICE Technical Report, Vol. 105, No. 325, pp. 51-56, for example).